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IPPS
2005
IEEE
15 years 7 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
ICPPW
2003
IEEE
15 years 6 months ago
A Fault-tolerant Routing Strategy for Gaussian Cube Using Gaussian Tree
Gaussian Cubes (GCs) are a family of interconnection topologies in which the interconnection density and algorithmic efficiency are linked by a common parameter, the variation of ...
Loh Peter, Xinhua Zhang
MSO
2003
15 years 2 months ago
Simulation based Development of Efficient Hardware for Sort based Algorithms
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
Niklas Hansson, Jay H. Harris
ISORC
2002
IEEE
15 years 6 months ago
ARTISST: An Extensible and Modular Simulation Tool for Real-Time Systems
ARTISST (ARTISST is a Real-Time System Simulation Tool) is a modular event-driven simulation framework for real-time systems. It is targeted towards the performance evaluation of ...
David Decotigny, Isabelle Puaut
IPPS
2009
IEEE
15 years 8 months ago
Predictive analysis and optimisation of pipelined wavefront computations
Pipelined wavefront computations are a ubiquitous class of parallel algorithm used for the solution of a num­ ber of scientific and engineering applications. This paper investig...
Gihan R. Mudalige, Simon D. Hammond, J. A. Smith, ...