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» Performance Prediction of a Parallel Simulator
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141
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IDA
2009
Springer
15 years 10 months ago
Selecting Computer Architectures by Means of Control-Flow-Graph Mining
Abstract Deciding which computer architecture provides the best performance for a certain program is an important problem in hardware design and benchmarking. While previous approa...
Frank Eichinger, Klemens Böhm
120
Voted
ICMCS
2005
IEEE
109views Multimedia» more  ICMCS 2005»
15 years 9 months ago
An Efficient Architecture for Lifting-Based Forward and Inverse Discrete Wavelet Transform
In this research, an architecture that performs both forward and inverse lifting-based discrete wavelet transform is proposed. The proposed architecture reduces the hardware requi...
S. Mayilavelane Aroutchelvame, Kaamran Raahemifar
128
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WSC
2008
15 years 6 months ago
Coping with typical unpredictable incidents in a logic fab
Within the last months the semiconductor plant of Infineon in Dresden has converted to a pure manufacturer of logic products. With it, premises for production control have changed...
Wolfgang Scholl
ISCA
1999
IEEE
89views Hardware» more  ISCA 1999»
15 years 8 months ago
Simultaneous Subordinate Microthreading (SSMT)
Current work in Simultaneous Multithreading provides little benefit to programs that aren't partitioned into threads. We propose Simultaneous Subordinate Microthreading (SSMT...
Robert S. Chappell, Jared Stark, Sangwook P. Kim, ...
GLVLSI
2007
IEEE
173views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Modeling and estimating leakage current in series-parallel CMOS networks
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
Paulo F. Butzen, André Inácio Reis, ...