Sciweavers

2964 search results - page 327 / 593
» Performance Prediction of a Parallel Simulator
Sort
View
DAC
2010
ACM
15 years 7 months ago
On the costs and benefits of stochasticity in stream processing
With the end of clock-frequency scaling, parallelism has emerged as the key driver of chip-performance growth. Yet, several factors undermine efficient simultaneous use of onchip ...
Raj R. Nadakuditi, Igor L. Markov
ICDCSW
2008
IEEE
15 years 10 months ago
Heuristic Relay Node Selection Algorithm for One-Hop Overlay Routing
—This paper reviews the characteristics of overlay networks and defines effective relay nodes that can improve the performance of interactive real-time applications. A heuristic ...
Yin Chen, Li Tang, Jun Li
HOTI
2005
IEEE
15 years 9 months ago
A Scalable, Self-Routed, Terabit Capacity, Photonic Interconnection Network
We present SPINet (Scalable Photonic Integrated Network), an optical switching architecture particularly designed for photonic integration. The performance of SPINet-based network...
Assaf Shacham, Benjamin G. Lee, Keren Bergman
ICANN
1997
Springer
15 years 8 months ago
On-Line Hebbian Learning for Spiking Neurons: Architecture of the Weight-Unit of NESPINN
: We present the implementation of on-line Hebbian learning for NESPINN, the Neurocomputer for the simulation of spiking neurons. In order to support various forms of Hebbian learn...
Ulrich Roth, Axel Jahnke, Heinrich Klar
ICPP
1998
IEEE
15 years 8 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang