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ISCA
1998
IEEE
108views Hardware» more  ISCA 1998»
15 years 8 months ago
Pipeline Gating: Speculation Control for Energy Reduction
Branch prediction has enabled microprocessors to increase instruction level parallelism (ILP) by allowing programs to speculatively execute beyond control boundaries. Although spe...
Srilatha Manne, Artur Klauser, Dirk Grunwald
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 9 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
WSC
2004
15 years 5 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
CLUSTER
2009
IEEE
15 years 11 months ago
Analyzing massive astrophysical datasets: Can Pig/Hadoop or a relational DBMS help?
Abstract— As the datasets used to fuel modern scientific discovery grow increasingly large, they become increasingly difficult to manage using conventional software. Parallel d...
Sarah Loebman, Dylan Nunley, YongChul Kwon, Bill H...
IPPS
2006
IEEE
15 years 10 months ago
Non-cooperative, semi-cooperative, and cooperative games-based grid resource allocation
In this paper we consider, compare and analyze three game theoretical Grid resource allocation mechanisms. Namely, 1) the non-cooperative sealed-bid method where tasks are auction...
Samee Ullah Khan, Ishfaq Ahmad