Sciweavers

2964 search results - page 421 / 593
» Performance Prediction of a Parallel Simulator
Sort
View
IPPS
2000
IEEE
15 years 9 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
IPPS
2000
IEEE
15 years 9 months ago
A Mechanism for Speculative Memory Accesses Following Synchronizing Operations
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
Takayuki Sato, Kazuhiko Ohno, Hiroshi Nakashima
ICDCS
1999
IEEE
15 years 9 months ago
Proxy Cache Coherency and Replacement - Towards a More Complete Picture
This work studies the interaction of Web proxy cache coherency and replacement policies using trace-driven simulations. We specifically examine the relative importance of each typ...
Balachander Krishnamurthy, Craig E. Wills
HCW
1998
IEEE
15 years 9 months ago
A Dynamic Matching and Scheduling Algorithm for Heterogeneous Computing Systems
A heterogeneous computing system provides a variety of different machines, orchestrated to perform an application whose subtasks have diverse execution requirements. The subtasks ...
Muthucumaru Maheswaran, Howard Jay Siegel
IEEEPACT
1998
IEEE
15 years 9 months ago
Origin 2000 Design Enhancements for Communication Intensive Applications
The SGI Origin 2000 is designedto support a wide range of applications and has low local and remote memory latencies. However, it often has a high ratio of remote to local misses....
Gheith A. Abandah, Edward S. Davidson