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» Performance Prediction of a Parallel Simulator
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ICDCS
2005
IEEE
15 years 3 months ago
Handling Asymmetry in Power Heterogeneous Ad Hoc Networks: A Cross Layer Approach
Power heterogeneous ad hoc networks are characterized by link layer asymmetry: the ability of lower power nodes to receive transmissions from higher power nodes but not vice versa...
Vasudev Shah, Srikanth V. Krishnamurthy
IEEEPACT
2003
IEEE
15 years 3 months ago
Constraint Graph Analysis of Multithreaded Programs
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
Harold W. Cain, Mikko H. Lipasti, Ravi Nair
IPPS
2003
IEEE
15 years 3 months ago
SoCBUS: Switched Network on Chip for Hard Real Time Embedded Systems
With the current trend in integration of more complex systems on chip there is a need for better communication infrastructure on chip that will increase the available bandwidth an...
Daniel Wiklund, Dake Liu
ICDCS
2000
IEEE
15 years 2 months ago
Scheduling Heuristics for Data Requests in an Oversubscribed Network with Priorities and Deadlines
Providing up-to-date input to users’ applications is an important data management problem for a distributed computing environment, where each data storage location and intermedi...
Mitchell D. Theys, Noah Beck, Howard Jay Siegel, M...
EUROPAR
1999
Springer
15 years 2 months ago
Annotated Memory References: A Mechanism for Informed Cache Management
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...