372 search results - page 36 / 75 » Performance Studies of a Parallel Prolog Architecture |
MICRO
1999
IEEE
15 years 2 months ago
1999
IEEE
The speculative multithreading paradigm (speculative threadlevel parallelism) is based on the concurrent execution of control-speculative threads. The efficiency of microarchitect...
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PROCEDIA
2011
14 years 1 months ago
2011
Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by...
ICS
2001
Tsinghua U.
15 years 3 months ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
ICPP
1997
IEEE
15 years 2 months ago
1997
IEEE
Most of recent research on distributed shared memory (DSM)systems have focused on either careful design of node controllersor cache coherenceprotocols. Whileevaluating these desig...
MICRO
1998
IEEE
15 years 2 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...