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» Performance Studies of a Parallel Prolog Architecture
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IPPS
2009
IEEE
15 years 5 months ago
Long time-scale simulations of in vivo diffusion using GPU hardware
To address the problem of performing long time simulations of biochemical pathways under in vivo cellular conditions, we have developed a lattice-based, reaction-diffusion model t...
Elijah Roberts, John E. Stone, Leonardo Sepulveda,...
PPSN
2004
Springer
15 years 3 months ago
Group Transport of an Object to a Target That Only Some Group Members May Sense
This paper addresses the cooperative transport of a heavy object, called prey, towards a sporadically changing target location by a group of robots. The study is focused on the sit...
Roderich Groß, Marco Dorigo
ISSS
1998
IEEE
124views Hardware» more  ISSS 1998»
15 years 2 months ago
Data-Path Synthesis of VLIW Video Signal Processors
This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programm...
Zhao Wu, Wayne Wolf
ISCA
1994
IEEE
104views Hardware» more  ISCA 1994»
15 years 2 months ago
Exploring the Design Space for a Shared-Cache Multiprocessor
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
Basem A. Nayfeh, Kunle Olukotun
IEEEPACT
2009
IEEE
15 years 5 months ago
Chainsaw: Using Binary Matching for Relative Instruction Mix Comparison
With advances in hardware, instruction set architectures are undergoing continual evolution. As a result, compilers are under constant pressure to adapt and take full advantage of...
Tipp Moseley, Dirk Grunwald, Ramesh Peri