3300 search results - page 473 / 660 » Performance Trade-Off in Distributed Simulation |
ASPLOS
2006
ACM
15 years 5 months ago
2006
ACM
Growing on-chip wire delays are motivating architectural features that expose on-chip communication to the compiler. EDGE architectures are one example of communication-exposed mi...
SAC
2006
ACM
15 years 5 months ago
2006
ACM
This paper describes an algorithm that allows Linux to perform multilevel load balancing in NUMA computers. The Linux scheduler implements a load balancing algorithm that uses str...
MSWIM
2004
ACM
15 years 4 months ago
2004
ACM
Today, three different physical (PHY) layers for the IEEE 802.11 WLAN are available (802.11a/b/g); they all provide multi-rate capabilities. To achieve a high performance under v...
101
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ICS
2004
Tsinghua U.
15 years 4 months ago
2004
Tsinghua U.
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
89
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HPCA
2009
IEEE
15 years 11 months ago
2009
IEEE
Analytical modeling is an alternative to detailed performance simulation with the potential to shorten the development cycle and provide additional insights. This paper proposes a...