1370 search results - page 46 / 274 » Performance analysis and optimization of latency insensitive... |
EUROPAR
2001
Springer
15 years 2 months ago
2001
Springer
High-accuracy PDE solvers use multi-dimensional fast Fourier transforms. The FFTs exhibits a static and structured memory access pattern which results in a large amount of communic...
CASES
2007
ACM
15 years 1 months ago
2007
ACM
We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature co...
JSA
2000
14 years 9 months ago
2000
Scheduling DAGs with communication times is the theoretical basis for achieving efficient parallelism on distributed memory systems. We generalize Graham's task-level in a ma...
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CORR
2007
Springer
14 years 9 months ago
2007
Springer
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
3DIC
2009
IEEE
15 years 2 months ago
2009
IEEE
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...