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» Performance and Functional Verification of Microprocessors
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ICCD
2007
IEEE
140views Hardware» more  ICCD 2007»
15 years 1 months ago
Continual hashing for efficient fine-grain state inconsistency detection
Transaction-level modeling (TLM) allows a designer to save functional verification effort during the modular refinement of an SoC by reusing the prior implementation of a module a...
Jae W. Lee, Myron King, Krste Asanovic
98
Voted
IPCCC
2007
IEEE
15 years 3 months ago
Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization
Leakage power is a major concern in current microarchitectures as it is increasing exponentially with decreasing transistor feature sizes. In this paper, we present a technique ca...
Santosh Talli, Ram Srinivasan, Jeanine Cook
SPAA
2005
ACM
15 years 3 months ago
Efficient algorithms for verifying memory consistency
One approach in verifying the correctness of a multiprocessor system is to show that its execution results comply with the memory consistency model it is meant to implement. It ha...
Chaiyasit Manovit, Sudheendra Hangal
HASE
2008
IEEE
15 years 4 months ago
A Grammar-Based Reverse Engineering Framework for Behavior Verification
A high assurance system requires both functional and nonfunctional correctness before the system is put into operation. To examine whether a system’s actual performance complies...
Chunying Zhao, Kang Zhang
SC
2005
ACM
15 years 3 months ago
A Power-Aware Run-Time System for High-Performance Computing
For decades, the high-performance computing (HPC) community has focused on performance, where performance is defined as speed. To achieve better performance per compute node, mic...
Chung-Hsing Hsu, Wu-chun Feng