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» Performance and Functional Verification of Microprocessors
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MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
15 years 3 months ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
CODES
2001
IEEE
15 years 1 months ago
The TACO protocol processor simulation environment
Network hardware design is becoming increasingly challenging because more and more demands are put on network bandwidth and throughput requirements, and on the speed with which ne...
Seppo Virtanen, Johan Lilius
ESOP
2010
Springer
15 years 6 months ago
Formal Verification of Coalescing Graph-Coloring Register Allocation
Iterated Register Coalescing (IRC) is a widely used heuristic for performing register allocation via graph coloring. Many implementations in existing compilers follow (more or less...
Andrew W. Appel, Benoît Robillard, Sandrine ...
ICPR
2006
IEEE
15 years 10 months ago
Off-line Signature Verification based on the Modified Direction Feature
Signature identification and verification has been a topic of interest and importance for many years in the area of biometrics. In this paper we present an effective method to per...
Stephane Armand, Michael Blumenstein, Vallipuram M...
IJCNN
2006
IEEE
15 years 3 months ago
Off-line Signature Verification using the Enhanced Modified Direction Feature and Neural-based Classification
—Signatures continue to be an important biometric for authenticating the identity of human beings. This paper presents an effective method to perform off-line signature verificat...
Stephane Armand, Michael Blumenstein, Vallipuram M...