Sciweavers

285 search results - page 23 / 57
» Performance and Functional Verification of Microprocessors
Sort
View
DAC
2005
ACM
15 years 10 months ago
Word level predicate abstraction and refinement for verifying RTL verilog
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
CVPR
2004
IEEE
15 years 11 months ago
A GMM Parts Based Face Representation for Improved Verification through Relevance Adaptation
Motivated by the success of parts based representations in face detection we have attempted to address some of the problems associated with applying such a philosophy to the task ...
Simon Lucey, Tsuhan Chen
96
Voted
JUCS
2006
131views more  JUCS 2006»
14 years 9 months ago
Verification of CRWL Programs with Rewriting Logic
Abstract: We present a novel approach to the verification of functional-logic programs. For our verification purposes, equational reasoning is not valid due to the presence of non-...
José Miguel Cleva, Isabel Pita
POPL
2009
ACM
15 years 10 months ago
Verifying distributed systems: the operational approach
This work develops an integrated approach to the verification of behaviourally rich programs, founded directly on operational semantics. The power of the approach is demonstrated ...
Tom Ridge
HPCA
2006
IEEE
15 years 10 months ago
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads
With the continuing growth in the amount of genetic data, members of the bioinformatics community are developing a variety of data-mining applications to understand the data and d...
Aamer Jaleel, Matthew Mattina, Bruce L. Jacob