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» Performance and Functional Verification of Microprocessors
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IPPS
2000
IEEE
15 years 10 months ago
Augmenting Modern Superscalar Architectures with Configurable Extended Instructions
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
Xianfeng Zhou, Margaret Martonosi
JCC
2008
92views more  JCC 2008»
15 years 5 months ago
Two-electron integral evaluation on the graphics processor unit
: We propose the algorithm to evaluate the Coulomb potential in the ab initio density functional calculation on the graphics processor unit (GPU). The numerical accuracy required f...
Koji Yasuda
149
Voted
ICCAD
1999
IEEE
97views Hardware» more  ICCAD 1999»
15 years 10 months ago
A methodology for correct-by-construction latency insensitive design
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
Luca P. Carloni, Kenneth L. McMillan, Alexander Sa...
CASES
2004
ACM
15 years 11 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
POPL
2006
ACM
16 years 6 months ago
Certified assembly programming with embedded code pointers
Embedded code pointers (ECPs) are stored handles of functions and continuations commonly seen in low-level binaries as well as functional or higher-order programs. ECPs are known ...
Zhaozhong Ni, Zhong Shao