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» Performance and Functional Verification of Microprocessors
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122
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ASAP
2007
IEEE
118views Hardware» more  ASAP 2007»
15 years 5 months ago
Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
Götz Kappen, S. el Bahri, O. Priebe, Tobias G...
128
Voted
TEC
2008
98views more  TEC 2008»
15 years 3 months ago
Opposition-Based Differential Evolution
Evolutionary Algorithms (EAs) are well-known optimization approaches to cope with non-linear, complex problems. These population-based algorithms, however, suffer from a general we...
Shahryar Rahnamayan, Hamid R. Tizhoosh, Magdy M. A...
132
Voted
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 7 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
DAC
2002
ACM
16 years 4 months ago
Embedded software-based self-testing for SoC design
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...
Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li...
124
Voted
FMICS
2010
Springer
15 years 1 months ago
A Study of Shared-Memory Mutual Exclusion Protocols Using CADP
Mutual exclusion protocols are an essential building block of concurrent systems: indeed, such a protocol is required whenever a shared resource has to be protected against concurr...
Radu Mateescu, Wendelin Serwe