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» Performance and Functional Verification of Microprocessors
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ICFP
2008
ACM
15 years 9 months ago
A scheduling framework for general-purpose parallel languages
The trend in microprocessor design toward multicore and manycore processors means that future performance gains in software will largely come from harnessing parallelism. To reali...
Matthew Fluet, Mike Rainey, John H. Reppy
CASES
2006
ACM
15 years 3 months ago
Limitations of special-purpose instructions for similarity measurements in media SIMD extensions
Microprocessor vendors have provided special-purpose instructions such as psadbw and pdist to accelerate the sumof-absolute differences (SAD) similarity measurement. The usefulne...
Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...
83
Voted
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 2 months ago
Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
André Seznec, Stephen Felix, Venkata Krishn...
TC
2008
14 years 9 months ago
The Synonym Lookaside Buffer: A Solution to the Synonym Problem in Virtual Caches
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
Xiaogang Qiu, Michel Dubois
108
Voted
TVLSI
2010
14 years 4 months ago
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-
Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are ...
Hai Lin, Yunsi Fei, Xuan Guan, Zhijie Jerry Shi