Sciweavers

212 search results - page 1 / 43
» Performance and power modeling in a multi-programmed multi-c...
Sort
View
202
Voted
CSE
2011
IEEE
14 years 26 days ago
Performance Enhancement of Network Devices with Multi-Core Processors
— In network based applications, packet capture is the main area that attracts many researchers in developing traffic monitoring systems. Along with the packet capture, many othe...
Nhat-Phuong Tran, Sugwon Hong, Myungho Lee, Seung-...
101
Voted
LCPC
2005
Springer
15 years 6 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
103
Voted
ATVA
2008
Springer
127views Hardware» more  ATVA 2008»
15 years 3 months ago
DiVinE Multi-Core - A Parallel LTL Model-Checker
We present a tool for parallel shared-memory enumerative LTL model-checking and reachability analysis. The tool is based on distributed-memory algorithms reimplemented specifically...
Jiri Barnat, Lubos Brim, Petr Rockai
95
Voted
ENTCS
2008
134views more  ENTCS 2008»
15 years 1 months ago
A Stack-Slicing Algorithm for Multi-Core Model Checking
The broad availability of multi-core chips on standard desktop PCs provides strong motivation for the development of new algorithms for logic model checkers that can take advantag...
Gerard J. Holzmann
109
Voted
IEEEPACT
2007
IEEE
15 years 7 months ago
A Flexible Heterogeneous Multi-Core Architecture
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
Miquel Pericàs, Adrián Cristal, Fran...