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HIPEAC
2007
Springer
14 years 16 days ago
Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems
Voltage scaling reduces leakage power for cache lines unlikely to be referenced soon. Partitioning reduces dynamic power via smaller, specialized structures. We combine approaches,...
Major Bhadauria, Sally A. McKee, Karan Singh, Gary...
HPCA
2005
IEEE
13 years 12 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
14 years 3 months ago
Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
Jinfeng Liu, Pai H. Chou
ICPP
1997
IEEE
13 years 10 months ago
Automatic Partitioning of Data and Computations on Scalable Shared Memory Multiprocessors
Abstract—This paper describes an algorithm for deriving data and computation partitions on scalable shared memory multiprocessors. The algorithm establishes affinity relationshi...
Sudarsan Tandri, Tarek S. Abdelrahman
CCGRID
2001
IEEE
13 years 10 months ago
Latency Hiding in Dynamic Partitioning and Load Balancing of Grid Computing Applications
The Information Power Grid (IPG) concept developed by NASA is aimed to provide a metacomputing platform for large-scale distributed computations, by hiding the intricacies of a hig...
Sajal K. Das, Daniel J. Harvey, Rupak Biswas