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HIPEAC
2005
Springer
15 years 3 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
90
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COMSWARE
2007
IEEE
15 years 4 months ago
Leveraging MAC-layer information for single-hop wireless transport in the Cache and Forward Architecture of the Future Internet
— Cache and Forward (CNF) Architecture is a novel architecture aimed at delivering content efficiently to potentially large number of intermittently connected mobile hosts. It us...
Sumathi Gopal, Sanjoy Paul, Dipankar Raychaudhuri
CAISE
2005
Springer
15 years 3 months ago
Capitalizing on Awareness of User Tasks for Guiding Self-Adaptation
Abstract. Computers support more and more tasks in the personal and professional activities of users. Such user tasks increasingly span large periods of time and many locations acr...
João Pedro Sousa, Vahe Poladian, David Garl...
ISPDC
2010
IEEE
14 years 8 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...
ECRTS
2007
IEEE
15 years 4 months ago
Cache-Aware Timing Analysis of Streaming Applications
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoud...