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96
Voted
WSC
1997
14 years 11 months ago
1997
We present a system for describing and solving closed queuing network models of the memory access performance of NUMA architectures. The system consists of a model description lan...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
DATE
2010
IEEE
14 years 10 months ago
2010
IEEE
Abstract--In the current environment of rapidly changing invehicle requirements and ever-increasing functional content for automotive EE systems, there are several sources of uncer...
ICALP
1998
Springer
15 years 1 months ago
1998
Springer
An architecture is described for designing systems that acquire and manipulate large amounts of unsystematized, or so-called commonsense, knowledge. Its aim is to exploit to the fu...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...