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DAC
2001
ACM
16 years 2 months ago
Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
Kaustav Banerjee, Amit Mehrotra
ALP
1992
Springer
15 years 6 months ago
Definitional Trees
Rewriting is a computational paradigm that specifies the actions, but not the control. We introduce a hierarchical structure repreat a high level of abstraction, a form of control....
Sergio Antoy
DAC
2007
ACM
16 years 3 months ago
Compact State Machines for High Performance Pattern Matching
Pattern matching is essential to a wide range of applications such as network intrusion detection, virus scanning, etc. Pattern matching algorithms normally rely on state machines...
Piti Piyachon, Yan Luo
DAC
1999
ACM
15 years 6 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
ISORC
1998
IEEE
15 years 6 months ago
The Time-Triggered Architecture
The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. A large real-time applicatio...
Hermann Kopetz