1007 search results - page 50 / 202 » Performance based design of high-level language-directed com... |
MINENET
2005
ACM
15 years 3 months ago
2005
ACM
BGP updates are triggered by a variety of events such as link failures, resets, routers crashing, configuration changes, and so on. Making sense of these updates and identifying ...
SC
2005
ACM
15 years 3 months ago
2005
ACM
We describe the software architecture, technical features, and performance of TICK (Transparent Incremental Checkpointer at Kernel level), a system-level checkpointer implemented ...
FPL
2009
Springer
15 years 2 months ago
2009
Springer
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
DAC
1997
ACM
15 years 1 months ago
1997
ACM
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and de...