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HPCA
2000
IEEE
15 years 2 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
MIDDLEWARE
2004
Springer
15 years 3 months ago
Architecture for resource allocation services supporting interactive remote desktop sessions in utility grids
Emerging large scale utility computing systems like Grids promise computing and storage to be provided to end users as a utility. System management services deployed in the middle...
Vanish Talwar, Bikash Agarwalla, Sujoy Basu, Raj K...
ICPP
2006
IEEE
15 years 3 months ago
Data Transfers between Processes in an SMP System: Performance Study and Application to MPI
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...
Darius Buntinas, Guillaume Mercier, William Gropp
DAC
2006
ACM
15 years 10 months ago
A real time budgeting method for module-level-pipelined bus based system using bus scenarios
In designing bus based systems with parallel and pipelined architecture, it is important to derive a real time budget (a specified execution time limit) for each task of a bus bas...
Tadaaki Tanimoto, Seiji Yamaguchi, Akio Nakata, Te...
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
15 years 4 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi