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CODES
2006
IEEE
15 years 3 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
HPCA
2009
IEEE
15 years 10 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
DAC
1998
ACM
15 years 10 months ago
A Case Study in Embedded System Design: An Engine Control Unit
A number of techniques and software tools for embedded system design have been recently proposed. However, the current practice in the designer community is heavily based on manua...
Alberto L. Sangiovanni-Vincentelli, Antonino Damia...
DAC
2005
ACM
15 years 10 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DAC
2006
ACM
15 years 3 months ago
DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip
A novel routing algorithm, namely dynamic XY (DyXY) routing, is proposed for NoCs to provide adaptive routing and ensure deadlock-free and livelock-free routing at the same time. ...
Ming Li, Qing-An Zeng, Wen-Ben Jone