332 search results - page 8 / 67 » Performance evaluation of a java chip-multiprocessor |
ICS
1999
Tsinghua U.
15 years 1 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
ISCAS
2007
IEEE
15 years 3 months ago
2007
IEEE
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
CF
2005
ACM
14 years 11 months ago
2005
ACM
Thread-level speculative execution is a technique that makes it possible for a wider range of single-threaded applications to make use of the processing resources in a chip multip...
ISCA
2007
IEEE
15 years 3 months ago
2007
IEEE
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...
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CSC
2010
14 years 7 months ago
2010
Emergence of chip multiprocessor systems has dramatically increased the performance potential of computer systems. Since the amount of exploited parallelism is directly influenced ...