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» Performance evaluation of a new parallel preconditioner
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SIGMOD
2011
ACM
210views Database» more  SIGMOD 2011»
14 years 23 days ago
A platform for scalable one-pass analytics using MapReduce
Today’s one-pass analytics applications tend to be data-intensive in nature and require the ability to process high volumes of data efficiently. MapReduce is a popular programm...
Boduo Li, Edward Mazur, Yanlei Diao, Andrew McGreg...
IAJIT
2011
14 years 1 months ago
An RFID-based validation system for halal food
: In recent years, Muslims have depended on the Halal logo, displayed on food packaging, to indicate that the products are prepared according to Halal precepts. As laid out in the ...
Mohd Nasir, Azah Norman, Shukor Fauzi, Masliyana A...
ICS
2004
Tsinghua U.
15 years 3 months ago
CQoS: a framework for enabling QoS in shared caches of CMP platforms
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
Ravi R. Iyer
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
15 years 3 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
15 years 4 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...