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ICS
2009
Tsinghua U.
13 years 11 months ago
Exploring pattern-aware routing in generalized fat tree networks
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...
Germán Rodríguez, Ramón Beivi...
TC
2008
13 years 6 months ago
An Efficient and Deadlock-Free Network Reconfiguration Protocol
Component failures and planned component replacements cause changes in the topology and routing paths supplied by the interconnection network of a parallel processor system over ti...
Olav Lysne, José Miguel Montañana, J...
INFOCOM
2002
IEEE
13 years 11 months ago
Design of Wavelength Converting Switches for Optical Burst Switching
— Optical Burst Switching (OBS) is an experimental network technology that enables the construction of very high capacity routers, using optical data paths and electronic control...
Jeyashankher Ramamirtham, Jonathan S. Turner
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 4 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
14 years 1 months ago
Light NUCA: A proposal for bridging the inter-cache latency gap
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
Darío Suárez Gracia, Teresa Monreal,...