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ISCA
1997
IEEE
104views Hardware» more  ISCA 1997»
15 years 9 months ago
Complexity-Effective Superscalar Processors
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
Subbarao Palacharla, Norman P. Jouppi, James E. Sm...
ICASSP
2011
IEEE
14 years 8 months ago
Evaluating music sequence models through missing data
Building models of the structure in musical signals raises the question of how to evaluate and compare different modeling approaches. One possibility is to use the model to impute...
Thierry Bertin-Mahieux, Graham Grindlay, Ron J. We...
IPCCC
2006
IEEE
15 years 11 months ago
Connectionless port scan detection on the backbone
Considerable research has been done on detecting and blocking portscan activities that are typically conducted by infected hosts to discover other vulnerable hosts. However, the f...
Avinash Sridharan, Tao Ye, Supratik Bhattacharyya
SIGCOMM
1999
ACM
15 years 9 months ago
A Readable TCP in the Prolac Protocol Language
Prolac is a new statically-typed, object-oriented language for network protocol implementation. It is designed for readability, extensibility, and real-world implementation; most ...
Eddie Kohler, M. Frans Kaashoek, David R. Montgome...
ACL
2003
15 years 6 months ago
Improved Source-Channel Models for Chinese Word Segmentation
This paper presents a Chinese word segmentation system that uses improved sourcechannel models of Chinese sentence generation. Chinese words are defined as one of the following fo...
Jianfeng Gao, Mu Li, Changning Huang