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SDL
2003
147views Hardware» more  SDL 2003»
15 years 7 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
DKE
2007
95views more  DKE 2007»
15 years 6 months ago
Strategies for improving the modeling and interpretability of Bayesian networks
One of the main factors for the knowledge discovery success is related to the comprehensibility of the patterns discovered by applying data mining techniques. Amongst which we can...
Ádamo L. de Santana, Carlos Renato Lisboa F...
AINA
2007
IEEE
16 years 15 days ago
Synthetic Trace-Driven Simulation of Cache Memory
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...
JCP
2007
108views more  JCP 2007»
15 years 6 months ago
A Genetic Algorithm Method to Assimilate Sensor Data for a Toxic Contaminant Release
— Following a toxic contaminant release, either accidental or intentional, predicting the transport and dispersion of the contaminant becomes a critical problem for Homeland Defe...
Sue Ellen Haupt, George S. Young, Christopher T. A...
WSC
1997
15 years 7 months ago
Java Based Conservative Distributed Simulation
Distributed discrete event simulation techniques aim at an acceleration of the execution of a self-contained simulation model by the spatial decomposition of that model and the co...
Alois Ferscha, Michael Richter