A major research goal for compilers and environments is the automatic derivation of tools from formal specifications. However, the formal model of the language is often inadequat...
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
Han Wei, Mark Muir, Ioannis Nousias, Tughrul Arsla...
This paper presents snlp+ebl, the first implementation of explanation based learning techniques for a partial order planner. We describe the basic learning framework of snlp+ebl, ...
Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propos...
In program analysis and verification, there are some constraints that have to be processed repeatedly. A possible way to speed up the processing is to find some relations among the...