Sciweavers

290 search results - page 57 / 58
» Performance of Hardware Compressed Main Memory
Sort
View
SPAA
2004
ACM
13 years 11 months ago
Cache-oblivious shortest paths in graphs using buffer heap
We present the Buffer Heap (BH), a cache-oblivious priority queue that supports Delete-Min, Delete, and Decrease-Key operations in O( 1 B log2 N B ) amortized block transfers fro...
Rezaul Alam Chowdhury, Vijaya Ramachandran
SOSP
2009
ACM
14 years 3 months ago
Fast byte-granularity software fault isolation
Bugs in kernel extensions remain one of the main causes of poor operating system reliability despite proposed techniques that isolate extensions in separate protection domains to ...
Miguel Castro, Manuel Costa, Jean-Philippe Martin,...
TPDS
2010
174views more  TPDS 2010»
13 years 4 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
VIS
2007
IEEE
125views Visualization» more  VIS 2007»
14 years 7 months ago
High-Quality Multimodal Volume Rendering for Preoperative Planning of Neurosurgical Interventions
Surgical approaches tailored to an individual patient's anatomy and pathology have become standard in neurosurgery. Precise preoperative planning of these procedures, however,...
Johanna Beyer, Markus Hadwiger, Stefan Wolfsberg...
VLDB
2007
ACM
145views Database» more  VLDB 2007»
14 years 6 months ago
Executing Stream Joins on the Cell Processor
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
Bugra Gedik, Philip S. Yu, Rajesh Bordawekar