151 search results - page 8 / 31 » Performance of Parallel Concatenated Coding Schemes |
72
Voted
GLOBECOM
2006
IEEE
15 years 5 months ago
2006
IEEE
— We present a field programmable gate array (FPGA) implementation of a turbo-like decoder for a serially concatenated pulse-position modulation (SCPPM) code. NASA developed thi...
GLOBECOM
2006
IEEE
15 years 5 months ago
2006
IEEE
Abstract— This paper presents an Interleaver-Division Multiple Access (IDMA) based architecture with single-user decoding using parallel concatenated non-linear trellis codes (PC...
108
Voted
SC
1995
ACM
15 years 3 months ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
DCC
2003
IEEE
15 years 11 months ago
2003
IEEE
Embedded computing systems are space and cost sensitive; memory is one of the most restricted resources, posing serious constraints on program size. Code compression, which is a s...
ICC
2008
IEEE
15 years 6 months ago
2008
IEEE
— When channel state information (CSI) is available at both transmit and receive sides, singular value decomposition (SVD) converts the MIMO channel into parallel subchannels. It...