149 search results - page 20 / 30 » Performance of Zebra Routing Software |
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
CISIS
2008
IEEE
15 years 4 months ago
2008
IEEE
As the end of Moores-law is on the horizon, power becomes a limiting factor to continuous increases in performance gains for single-core processors. Processor engineers have shifte...
LCTRTS
2010
Springer
14 years 7 months ago
2010
Springer
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
110
Voted
PADS
2003
ACM
15 years 2 months ago
2003
ACM
We describe two major developments in the General Network Simulation Integration System (Genesis): the support for BGP protocol in large network simulations and distribution of th...
CODES
2008
IEEE
14 years 11 months ago
2008
IEEE
The performance of system-on-chip is determined not only by the performance of its functional units, but also by how efficiently they cooperate with one another. It is the on-chip...