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CCECE
2006
IEEE
15 years 5 months ago
Survey of Biological High Performance Computing: Algorithms, Implementations and Outlook Research
During recent years there has been an explosive growth of biological data coming from genome projects, proteomics, protein structure determination, and the rapid expansion in digi...
Nasreddine Hireche, J. M. Pierre Langlois, Gabriel...
MIDDLEWARE
2005
Springer
15 years 5 months ago
Generic Middleware Substrate Through Modelware
Abstract. Conventional middleware architectures suffer from insufficient module-level reusability and the ability to adapt in face of functionality evolution and diversification....
Charles Zhang, Dapeng Gao, Hans-Arno Jacobsen
105
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ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
15 years 6 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
3DPVT
2006
IEEE
233views Visualization» more  3DPVT 2006»
15 years 5 months ago
Scanline Optimization for Stereo on Graphics Hardware
In this work we propose a scanline optimization procedure for computational stereo using a linear smoothness cost model performed by programmable graphics hardware. The main idea ...
Christopher Zach, Mario Sormann, Konrad F. Karner
ICPP
2002
IEEE
15 years 4 months ago
BPA: A Fast Packet Scheduling Algorithm for Real-Time Switched Ethernet Networks
In this paper, we present a MAC-Iayer packet scheduling algorithm called BPA, for real-time switched Ethernet networks. BPA considers a message model where trans-node application-...
Jinggang Wang, Binoy Ravindran