Sciweavers

3321 search results - page 108 / 665
» Performance of parallel computations with dynamic processor ...
Sort
View
141
Voted
HPCA
1997
IEEE
15 years 7 months ago
Global Address Space, Non-Uniform Bandwidth: A Memory System Performance Characterization of Parallel Systems
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
Thomas Stricker, Thomas R. Gross
118
Voted
IPPS
1998
IEEE
15 years 7 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
CONCURRENCY
2010
112views more  CONCURRENCY 2010»
15 years 3 months ago
Performance results of running parallel applications on the InteGrade
The InteGrade project is an on-going project with the participation of several research groups in Brazil. It is an opportunistic grid middleware that intends to exploit the idle t...
E. N. Cáceres, Henrique Mongelli, L. Lourei...
141
Voted
JPDC
2008
167views more  JPDC 2008»
15 years 3 months ago
A performance study of general-purpose applications on graphics processors using CUDA
Graphics processors (GPUs) provide a vast number of simple, data-parallel, deeply multithreaded cores and high memory bandwidths. GPU architectures are becoming increasingly progr...
Shuai Che, Michael Boyer, Jiayuan Meng, David Tarj...
130
Voted
PDCAT
2005
Springer
15 years 9 months ago
Gracefully Degrading Battery-Aware Static Multiprocessor Schedules Based on Symmetric Task Fusion
A novel strategy for employing schedules obtained using standard static scheduling algorithms in a battery powered multiprocessor environment is investigated. The strategy is able...
Frode Eika Sandnes, Oliver Sinnen, Yo-Ping Huang