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163
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IPPS
2009
IEEE
15 years 10 months ago
Multi-dimensional characterization of temporal data mining on graphics processors
Through the algorthmic design patterns of data parallelism and task parallelism, the graphics processing unit (GPU) offers the potential to vastly accelerate discovery and innovat...
Jeremy S. Archuleta, Yong Cao, Thomas Scogland, Wu...
132
Voted
HPCA
2003
IEEE
16 years 3 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
127
Voted
IPPS
2009
IEEE
15 years 10 months ago
Performance modeling in action: Performance prediction of a Cray XT4 system during upgrade
We present predictive performance models of two of the petascale applications, S3D and GTC, from the DOE Office of Science workload. We outline the development of these models and...
Kevin J. Barker, Kei Davis, Darren J. Kerbyson
127
Voted
VLSI
2007
Springer
15 years 9 months ago
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
Replacing functional units of an extensible processor with reconfigurable functional units enhances performance and flexibility of processors to execute custom instructions. That ...
Arash Mehdizadeh, Behnam Ghavami, Morteza Saheb Za...
CLUSTER
2006
IEEE
15 years 9 months ago
Matrix Multiplication on Two Interconnected Processors
This paper presents a new partitioning algorithm to perform matrix multiplication on two interconnected heterogeneous processors. Data is partitioned in a way which minimizes the ...
Brett A. Becker, Alexey L. Lastovetsky