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114
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IPPS
1998
IEEE
15 years 7 months ago
Vector Prefix and Reduction Computation on Coarse-Grained, Distributed-Memory Parallel Machines
Vector prefix and reduction are collective communication primitives in which all processors must cooperate. We present two parallel algorithms, the direct algorithm and the split ...
Seungjo Bae, Dongmin Kim, Sanjay Ranka
129
Voted
IEEEPACT
1999
IEEE
15 years 8 months ago
The Effect of Program Optimization on Trace Cache Efficiency
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
Derek L. Howard, Mikko H. Lipasti
83
Voted
ISSAC
2007
Springer
83views Mathematics» more  ISSAC 2007»
15 years 9 months ago
Parallel computation of the rank of large sparse matrices from algebraic K-theory
This paper deals with the computation of the rank and some integer Smith forms of a series of sparse matrices arising in algebraic K-theory. The number of non zero entries in the ...
Jean-Guillaume Dumas, Philippe Elbaz-Vincent, Pasc...
136
Voted
LCN
2002
IEEE
15 years 8 months ago
Design and Analysis of a Dynamically Reconfigurable Network Processor
The combination of high-performance processing power and flexibility found in network processors (NPs) has made them a good solution for today’s packet processing needs. Similar...
Ian A. Troxel, Alan D. George, Sarp Oral
171
Voted
MICRO
1998
IEEE
108views Hardware» more  MICRO 1998»
15 years 7 months ago
Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications
Three dimensional (3D) graphics applications have become very important workloads running on today's computer systems. A cost-effective graphics solution is to perform geomet...
Chia-Lin Yang, Barton Sano, Alvin R. Lebeck