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143
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HPCA
2003
IEEE
16 years 4 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
HPDC
2000
IEEE
15 years 8 months ago
An Object Infrastructure for Computational Steering of Distributed Simulations
This paper presents a brief overview of a framework for the interactive steering of distributed applications that addresses three key issues: (1) Definition of Interaction Object...
Rajeev Muralidhar, Manish Parashar
128
Voted
MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
15 years 3 months ago
An integrated approach to accelerate data and predicate computations in hyperblocks
To exploit increased instruction-level parallelism available in modern processors, we describe the formation and optimization of tracenets, an integrated approach to reducing the ...
Alexandre E. Eichenberger, Waleed Meleis, Suman Ma...
CF
2008
ACM
15 years 5 months ago
Fpga-based prototype of a pram-on-chip processor
PRAM (Parallel Random Access Model) has been widely regarded a desirable parallel machine model for many years, but it is also believed to be "impossible in reality." As...
Xingzhi Wen, Uzi Vishkin
128
Voted
EUROPAR
1997
Springer
15 years 7 months ago
Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
Edward D. Moreno, Sergio Takeo Kofuji, Marcelo H. ...