3321 search results - page 182 / 665 » Performance of parallel computations with dynamic processor ... |
119
click to vote
IPPS
2005
IEEE
15 years 9 months ago
2005
IEEE
We introduce a set of techniques to both measure and optimize memory access locality of Java applications running on cc-NUMA servers. These techniques work at the object level and...
145
Voted
HPCA
2001
IEEE
16 years 4 months ago
2001
IEEE
fipical translation lookaside buffers (TLBs)can map a far smaller region of memory than application footprints demand, and the cost of handling TLB misses therefore limits the per...
106
click to vote
ICPP
1999
IEEE
15 years 8 months ago
1999
IEEE
Trace-level reuse is based on the observation that some traces (dynamic sequences of instructions) are frequently repeated during the execution of a program, and in many cases, th...
151
click to vote
ICS
2009
Tsinghua U.
15 years 10 months ago
2009
Tsinghua U.
Molecular Dynamics applications enhance our understanding of biological phenomena through bio-molecular simulations. Large-scale parallelization of MD simulations is challenging b...
150
click to vote
FCCM
2006
IEEE
15 years 7 months ago
2006
IEEE
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...