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HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
15 years 8 months ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...
POPL
2003
ACM
16 years 4 months ago
Bitwidth aware global register allocation
Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is assigned a r...
Sriraman Tallam, Rajiv Gupta
IPPS
2003
IEEE
15 years 9 months ago
New Dynamic Heuristics in the Client-Agent-Server Model
MCT is a widely used heuristic for scheduling tasks onto grid platforms. However, when dealing with many tasks, MCT tends to dramatically delay already mapped task completion time...
Yves Caniou, Emmanuel Jeannot
WCET
2010
15 years 1 months ago
WCET Analysis of a Parallel 3D Multigrid Solver Executed on the MERASA Multi-Core
To meet performance requirements as well as constraints on cost and power consumption, future embedded systems will be designed with multi-core processors. However, the question o...
Christine Rochange, Armelle Bonenfant, Pascal Sain...
HPCA
2003
IEEE
16 years 4 months ago
Mini-Threads: Increasing TLP on Small-Scale SMT Processors
Several manufacturers have recently announced the first simultaneous-multithreaded processors, both as single CPUs and as components of multi-CPU chips. All are small scale, compr...
Joshua Redstone, Susan J. Eggers, Henry M. Levy