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SIAMCOMP
1998
117views more  SIAMCOMP 1998»
15 years 4 months ago
The Queue-Read Queue-Write PRAM Model: Accounting for Contention in Parallel Algorithms
This paper introduces the queue-read, queue-write (qrqw) parallel random access machine (pram) model, which permits concurrent reading and writing to shared memory locations, but ...
Phillip B. Gibbons, Yossi Matias, Vijaya Ramachand...
ICPP
2006
IEEE
15 years 10 months ago
Vector Lane Threading
Multi-lane vector processors achieve excellent computational throughput for programs with high data-level parallelism (DLP). However, application phases without significant DLP ar...
Suzanne Rivoire, Rebecca Schultz, Tomofumi Okuda, ...
EUROPAR
2001
Springer
15 years 9 months ago
A Case Study of Load Distribution in Parallel View Frustum Culling and Collision Detection
Abstract. When parallelizing hierarchical view frustum culling and collision detection, the low computation cost per node and the fact that the traversal path through the tree stru...
Ulf Assarsson, Per Stenström
CF
2006
ACM
15 years 10 months ago
Kilo-instruction processors, runahead and prefetching
There is a continuous research effort devoted to overcome the memory wall problem. Prefetching is one of the most frequently used techniques. A prefetch mechanism anticipates the ...
Tanausú Ramírez, Alex Pajuelo, Olive...
ICPP
2002
IEEE
15 years 9 months ago
Power Aware Scheduling for AND/OR Graphs in Multi-Processor Real-Time Systems
Power aware computing has become popular recently and many techniques have been proposed to manage the energy consumption for traditional real-time applications. We have previousl...
Dakai Zhu, Nevine AbouGhazaleh, Daniel Mossé...