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ISPAN
1997
IEEE
15 years 9 months ago
CASS: an efficient task management system for distributed memory architectures
The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the applica...
Jing-Chiou Liou, Michael A. Palis
CAMP
2005
IEEE
15 years 6 months ago
16-bit Floating Point Instructions for Embedded Multimedia Applications
— We have simulated the implementation of 16-bit floating point instructions on a Pentium4 and PowerPC G4 and G5 to evaluate the performance impact of these instructions in embed...
Lionel Lacassagne, Daniel Etiemble, S. A. Ould Kab...
SIGARCH
2008
97views more  SIGARCH 2008»
15 years 4 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...
IPPS
2005
IEEE
15 years 10 months ago
Stream PRAM
Parallel random access memory, or PRAM, is a now venerable model of parallel computation that that still retains its usefulness for the design and analysis of parallel algorithms....
Darrell R. Ulm, Michael Scherger
SC
2000
ACM
15 years 9 months ago
Scalable Molecular Dynamics for Large Biomolecular Systems
We present an optimized parallelization scheme for molecular dynamics simulations of large biomolecular systems, implemented in the production-quality molecular dynamics program N...
Robert Brunner, James C. Phillips, Laxmikant V. Ka...