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157
Voted
ICDCS
2002
IEEE
15 years 9 months ago
2002
IEEE
We present a generic module, called Fast Collect. Fast Collect is an implementation of Single-Writer Multi-Reader (SWMR) Shared-Memory in an asynchronous system in which a process...
141
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ISPAN
2008
IEEE
15 years 11 months ago
2008
IEEE
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardw...
129
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IPPS
2000
IEEE
15 years 9 months ago
2000
IEEE
The Distributed Virtual Communication Machine (DVCM) is a software communication architecture for clusters of workstations equipped with programmable network interfaces (NIs) for ...
126
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HPCA
2009
IEEE
16 years 5 months ago
2009
IEEE
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
143
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HPCA
2004
IEEE
16 years 5 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...