3321 search results - page 301 / 665 » Performance of parallel computations with dynamic processor ... |
154
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TC
2008
15 years 4 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
124
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IPPS
2000
IEEE
15 years 8 months ago
2000
IEEE
Abstract. While standard processors achieve supercomputer performance, a performance gap exists between the interconnect of MPP's and COTS. Standard solutions like Ethernet ca...
113
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IPPS
1994
IEEE
15 years 9 months ago
1994
IEEE
This paper describes several algorithms to perform all-to-all communication on a two-dimensional mesh connected computer with wormhole routing. We discuss both direct algorithms, ...
158
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CLUSTER
2002
IEEE
15 years 4 months ago
2002
IEEE
Distributed systems based on cluster of workstation are more and more difficult to manage due to the increasing number of processors involved, and the complexity of associated appl...
178
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HPCA
2005
IEEE
16 years 5 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...