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153
Voted
DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
134
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IPPS
1998
IEEE
15 years 9 months ago
1998
IEEE
We present a novel scheme for the solution of linear differential equation systems on parallel computers. The Implicit Pipeline (ImP) method uses an implicit timeintegration schem...
119
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ISVLSI
2008
IEEE
15 years 11 months ago
2008
IEEE
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
166
Voted
IPPS
1999
IEEE
15 years 9 months ago
1999
IEEE
Parallelizing compiler technology has improved in recent years. One area in which compilers have made progress is in handling DOACROSS loops, where crossprocessor data dependencie...
141
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IPPS
2006
IEEE
15 years 11 months ago
2006
IEEE
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...