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IPPS
1998
IEEE
15 years 9 months ago
A Case for Aggregate Networks
Parallel processing networks, even full crossbars, that only implement point-to-point and multicast message passing are inefficient for collective communications because multiple ...
Raymond Hoare, Henry G. Dietz
IPPS
2005
IEEE
15 years 10 months ago
Desynchronized Pfair Scheduling on Multiprocessors
Pfair scheduling, currently the only known way of optimally scheduling recurrent real-time tasks on multiprocessors, imposes certain requirements that may limit its practical impl...
UmaMaheswari C. Devi, James H. Anderson
ITNG
2007
IEEE
15 years 11 months ago
FPGA-based Vector Processing for Matrix Operations
A programmable vector processor and its implementation with a field-programmable gate array (FPGA) are presented. This processor is composed of a vector core and a tightly couple...
Hongyan Yang, Sotirios G. Ziavras, Jie Hu
MICRO
1996
IEEE
81views Hardware» more  MICRO 1996»
15 years 9 months ago
Instruction Scheduling and Executable Editing
Modern microprocessors offer more instruction-level parallelism than most programs and compilers can currently exploit. The resulting disparity between a machine's peak and a...
Eric Schnarr, James R. Larus
123
Voted
GECCO
2005
Springer
148views Optimization» more  GECCO 2005»
15 years 10 months ago
Multiobjective VLSI cell placement using distributed genetic algorithm
Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with significant run times. Two parallel models for GA are presented for VLSI cell placemen...
Sadiq M. Sait, Mohammed Faheemuddin, Mahmood R. Mi...