Sciweavers

3321 search results - page 356 / 665
» Performance of parallel computations with dynamic processor ...
Sort
View
119
Voted
ICPP
2009
IEEE
15 years 11 months ago
Direct N-body Kernels for Multicore Platforms
—We present an inter-architectural comparison of single- and double-precision direct n-body implementations on modern multicore platforms, including those based on the Intel Neha...
Nitin Arora, Aashay Shringarpure, Richard W. Vuduc
ISHPC
2003
Springer
15 years 10 months ago
A Simple Low-Energy Instruction Wakeup Mechanism
Instruction issue consumes a large amount of energy in out of order processors, largely in the wakeup logic. Proposed solutions to the problem require prediction or additional hard...
Marco A. Ramírez, Adrián Cristal, Al...
CODES
2001
IEEE
15 years 8 months ago
Retargetable compilation for low power
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
Wen-Tsong Shiue
ICPP
2006
IEEE
15 years 11 months ago
Designing Multithreaded Algorithms for Breadth-First Search and st-connectivity on the Cray MTA-2
stractions are extensively used to understand and solve challenging computational problems in various scientific and engineering domains. They have particularly gained prominence...
David A. Bader, Kamesh Madduri
PROCEDIA
2010
148views more  PROCEDIA 2010»
14 years 11 months ago
SysCellC: a data-flow programming model on multi-GPU
High performance computing with low cost machines becomes a reality with GPU. Unfortunately, high performances are achieved when the programmer exploits the architectural specific...
Dominique Houzet, Sylvain Huet, Anis Rahman