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HPCA
2008
IEEE
16 years 4 months ago
Uncovering hidden loop level parallelism in sequential applications
As multicore systems become the dominant mainstream computing technology, one of the most difficult challenges the industry faces is the software. Applications with large amounts ...
Hongtao Zhong, Mojtaba Mehrara, Steven A. Lieberma...
CIKM
2009
Springer
15 years 11 months ago
Location cache for web queries
This paper proposes a strategy to reduce the amount of hardware involved in the solution of search engine queries. It proposes using a secondary compact cache that keeps minimal i...
Mauricio Marín, Flavio Ferrarotti, Marcelo ...
IEEEPACT
2000
IEEE
15 years 8 months ago
Global Register Partitioning
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
Jason Hiser, Steve Carr, Philip H. Sweany
IWMM
2004
Springer
82views Hardware» more  IWMM 2004»
15 years 9 months ago
Write barrier elision for concurrent garbage collectors
Concurrent garbage collectors require write barriers to preserve consistency, but these barriers impose significant direct and indirect costs. While there has been a lot of work ...
Martin T. Vechev, David F. Bacon
JPDC
2011
129views more  JPDC 2011»
14 years 11 months ago
Static timing analysis for modeling QoS in networks-on-chip
Networks-on-chip (NoCs) are used in a growing number of SoCs and multi-core processors. Because messages compete for the NoC’s shared resources, quality of service and resource ...
Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Is...