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HPCA
2009
IEEE
16 years 5 months ago
Adaptive Spill-Receive for robust high-performance caching in CMPs
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
Moinuddin K. Qureshi
IPPS
2010
IEEE
15 years 2 months ago
Acceleration of spiking neural networks in emerging multi-core and GPU architectures
Recently, there has been strong interest in large-scale simulations of biological spiking neural networks (SNN) to model the human brain mechanisms and capture its inference capabi...
Mohammad A. Bhuiyan, Vivek K. Pallipuram, Melissa ...
IPPS
1999
IEEE
15 years 8 months ago
BRISK: A Portable and Flexible Distributed Instrumentation System
Researchers and practitioners in the area of parallel and distributed computing have been lacking a portable, flexible and robust distributed instrumentation system. We present th...
Aleksandar M. Bakic, Matt W. Mutka, Diane T. Rover
ALGORITHMICA
2005
195views more  ALGORITHMICA 2005»
15 years 4 months ago
Bit-Parallel Witnesses and Their Applications to Approximate String Matching
We present a new bit-parallel technique for approximate string matching. We build on two previous techniques. The first one, BPM [Myers, J. of the ACM, 1999], searches for a patte...
Heikki Hyyrö, Gonzalo Navarro
ICCS
2005
Springer
15 years 10 months ago
Dynamic Memory Management in the Loci Framework
Abstract. Resource management is a critical concern in high-performance computing software. While management of processing resources to increase performance is the most critical, e...
Yang Zhang, Edward A. Luke