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HPCA
2009
IEEE
15 years 11 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes
FPL
2004
Springer
101views Hardware» more  FPL 2004»
15 years 9 months ago
The Chess Monster Hydra
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...
Chrilly Donninger, Ulf Lorenz
168
Voted
ICPADS
2010
IEEE
15 years 2 months ago
GMH: A Message Passing Toolkit for GPU Clusters
Driven by the market demand for high-definition 3D graphics, commodity graphics processing units (GPUs) have evolved into highly parallel, multi-threaded, many-core processors, whi...
Jie Chen, William A. Watson III, Weizhen Mao
SKG
2005
IEEE
15 years 9 months ago
Information Services for Dynamically Assembled Semantic Grids
The information management requirements in systems based on Web Service Architecture principles include both the management of large amounts of relatively static services and assoc...
Mehmet S. Aktas, Geoffrey Fox, Marlon E. Pierce
129
Voted
IEEEPACT
2003
IEEE
15 years 9 months ago
Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures
This paper describes Compiler-Directed Content-Aware Prefetching (CDCAP), an integrated compiler and hardware approach for prefetching dynamic data structures. The approach utiliz...
Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors